Ian is the Chief Analyst of More Than Moore, a firm focusing on bridging the boundary between the complexity of describing compute silicon in the semiconductor space with the rapid changing nature of how new and multimedia content is consumed. Ian runs a newsletter, as well as a growing 
YouTube channel with over 75000 subscribers, with the goal of helping the fabless semiconductor companies broach complex topics with an extended engineering focused audience. Clients of More Than Moore include IBM, Intel, AMD, Qualcomm, Mediatek, and others. Prior to this, Ian spent 11 years covering CPUs and semiconductors for the popular online magazine AnandTech, and  completed a PhD in Computational Chemistry at Oxford in 2011.

Louis Gobin is a Product Marketing Engineer supporting Artificial Intelligence (AI) solutions in STMicroelectronics Americas Region and has held this position since February 2022. Gobin started his career as a machine-learning applications engineer for Cartesiam, based in New York. After ST acquired Cartesiam, Gobin moved to Santa Clara, CA in 2021 to take on the role of Field Application Engineer. He transferred into Product Marketing Engineer position in early 2022.   

Matt Graham leads the product engineering team for smart verification solutions at Cadence. His team drives product direction, customer engagement, technical marketing and new product introduction for various high technology software solutions, mainly in the Electronic Design Automation space.

Anders is CEO and co-founder at Imagimob. Anders has a strong experience in leading and  developing early-stage companies in the technology sector. Anders was a driving force from start to exit in AU-System Mobile/Across Wireless that was sold to Sonera Smarttrust in a Billion-dollar exit. Anders holds a MSc in Industrial Engineering and Management from Linköpings University.

Sumti Jairath is Chief Architect at SambaNova Systems, with expertise in hardware-software co-design. Sumti worked on PA-RISC-based Superdome servers back at HP, followed by several generations of SPARC CMT processors at Sun Microsystems and Oracle. At Oracle, Sumti worked on SQL, Data-analytics and Machine Learning acceleration in SPARC processors. Sumti holds 27 patents in computer architecture and hardware-software co-design.

A University of Massachussetts Lowel Alum, Bill Jenkins has over 25 years of experience in FPGAs within various markets, including AI, military, and financial. He is a key leader in High-Level Design Tools for FPGAs and AI solutions.

David Kanter is a Founder and the Executive Director of MLCommons where he helps lead the MLPerf benchmarks and other initiatives. He has 16+ years of experience in semiconductors, computing, and machine learning. He founded a microprocessor and compiler startup, was an early employee at Aster Data Systems, and has consulted for industry leaders such as Intel, Nvidia, KLA, Applied Materials, Qualcomm, Microsoft and many others. David holds a Bachelor of Science degree with honors in Mathematics with a specialization in Computer Science, and a Bachelor of Arts with honors in Economics from the University of Chicago.

Russell Klein is a Program Director at Siemens EDA’s (formerly Mentor Graphics) High-Level Synthesis Division focused on processor platforms. He is currently working on algorithm acceleration through the offloading of complex algorithms running as software on embedded CPUs into hardware accelerators using High-Level Synthesis. He has been with Mentor for over 25 years, holding a variety of engineering, marketing and management positions, primarily focused on the boundary between hardware and software. He holds six patents in the area of hardware/software verification and optimization. Prior to joining Mentor he worked for Synopsys, Logic Modeling, and Fairchild Semiconductor.

Yann Le Faou is an Associate Director at Microchip Technology, based in Arizona. Beside leading a group developing Capacitive Touch technologies, he’s also driving the corporate Machine learning initiative for MCU and MPU.

John Lorenz is a Senior Technology and Market Analyst, Computing & Software within the Semiconductor, Memory & Computing division at Yole Intelligence, part of Yole Group. John is engaged in the development of market and technology monitors for the logic segment of advanced semiconductors, with a primary focus on processors. Prior to joining Yole, John held various engineering and strategic planning roles over 15 years at Micron Technology. John has a Bachelor of Science degree in Mechanical Engineering from the University of Illinois Urbana-Champaign (USA), with a focus on MEMS devices.

Mr. Lytle leads product strategy, positioning, sales enablement and demand generation for Cadence electromagnetic simulation technologies. Mr. Lytle has held may positions in the RF and Simulation industry, including Technical Director with ANSYS, Inc, Lead Antenna Design Engineer with Dielectric 
Communications, Combat Systems Engineer with General Dynamics and Engineering Manager with Amphenol. He holds a Bachelors and Masters in Electrical Engineering from the University of Sothern Maine, and an MBA from Saint Joseph's. Mr. Lytle secured 4 US Patents, and currently serves in the US Coast Guard, after previously serving in the US Navy for current combined 
service of 22 years.

Avi has gained his Ph.D. at Weizmann Inst. of science studying ultrafast transistors and quantum devices. He has 25 years of managerial experience in the high-tech industry. He served as the device group manager of Tower Semiconductors and has hands-on experience in the design and fabrication of CMOS devices. Avi led large R&D teams to successful product commercialization. He acted as VP of Engineering of ShellCase and was instrumental in commercializing its wafer-level chip-scale packaging technology which is currently the dominating CSP packaging of CMOS image sensors. As VP of Engineering of Shellcase he successfully worked with more than 50 customers. He co-founded and acted as the CEO of semiconductors companies in the fields of active pixel CMOS image sensor and MEMS optical cross-connect as well as integrated optics and successfully worked with numerous fortune-500 business partners.

Rod Metcalfe is a Group Director in the Digital and Signoff product management team at Cadence, responsible for digital implementation flows and machine learning technology. He has been involved with EDA for over 20 years, gaining experience in all parts of the digital design flow from synthesis to sign-off. Before joining EDA, Rod was a chip designer in the aerospace industry. 

Vijay Janapa Reddi is an Associate Professor at Harvard University as well as the Vice President and a Founding Member of MLCommons. He co-chairs the MLCommons Research organization and sits on the board of directors of MLCommons. He co-led the development of the MLPerf Inference benchmark for IoT, mobile, edge and datacenter applications. He held the position of Associate Professor at The University of Texas at Austin's Department of Electrical and Computer Engineering before moving to Harvard. He focuses on developing computing platforms for mobile and edge computing, as well as the Internet of Things. His work is largely based on runtime systems, computer architecture, and machine learning principles. Dr. Janapa-Reddi holds degrees in computer science from Harvard University, electrical and computer engineering from the University of Colorado at Boulder, and computer engineering from Santa Clara University.

Andrew started his career writing video games in the days of 8-bit computers, progressing to write best-selling titles such as Pete Sampras Tennis. Andrew researched and developed early GPU compiler technology, and founded Codeplay in 2002. Codeplay have been producing compilers for games consoles, special-purpose processors and GPUs since then. Andrew chaired the SYCL standards group for its early years, which is now gaining rapid adoption, including now the C++ programming model for Intel's oneAPI. Today, Codeplay is a world-leading specialist in heterogeneous computing technology, now working on extreme challenges from exascale to artificial intelligence and safety for self-driving cars. In July 2022, Codeplay became a subsidiary of Intel with Andrew retained as CEO of Codeplay and VP of Intel.

As a Technology & Market Analyst, Computing & Software, Adrien Sanchez belongs to the Semiconductor, Memory & Computing division at Yole Intelligence, part of Yole Group. Adrien produces technology & market analyses covering computing hardware and software, AI, machine learning and neural networks. Adrien graduated with a double degree at Grenoble Institute of Technology PHELMA (Grenoble INP Phelma, France) and Grenoble Ecole de Management (GEM, France), and he earned an MSc on AI at Heriot-Watt University (Edinburgh, UK).

Dr Venkat Thanvantri is VP of R&D at Cadence where he leads the AI/ML development for the Digital and Signoff Products. Venkat holds a Ph.D. from the University of Florida and a master's from the Indian Institute of Science, Bangalore. He has over 20 years of experience in developing, managing, and deploying multiple EDA tools in the areas of timing, extraction, characterization, power, and place & route.